Semiconductor devices, in particular field-effect controlled switching devices such as a junction field effect transistor (JFET), a metal oxide semiconductor field effect transistor (MOSFET) and an insulated gate bipolar transistor (IGBT) are typically used for various applications including but not limited to switches in power supplies and power converters, electric cars, air-conditioners. Such semiconductor devices are typically manufactured on wafer-level. With increasing wafer-size manufacturing costs per chip typically decrease. Larger silicon-wafers, i.e. silicon-wafers with a diameter of at least 12″, are currently only available as magnetic Czochralski grown silicon wafers. Silicon-wafers with a diameter of 8″ are also available as float zone grown silicon wafers, but are comparatively expensive and may have a comparatively large resistance variation due to striations.
During single-crystal growth using the Czochralski (CZ) method, crystal defects such as crystal originated particles (COPs) or dislocation loops are formed. Agglomerated vacancy-related defects are known commonly as D-defects, or as COPs. Such defects may facilitate the formation of generation centers in the wafer resulting in an enhanced leakage current and weakening of later formed gate dielectrics.
Accordingly, there is a need to remove crystal originated particles from a crystalline silicon body.